Explore >> Select a destination

You are here

 unsafeperform.io
A Brainfuck CPU in FPGA (19 January 2013)
| | gergo.erdi.hu
CPU modeling in C?aSH (23 September 2018)
1.6 parsecs away

Travel
| | [AI summary] The author describes implementing a CHIP-8 CPU interpreter in Haskell, detailing the instruction set, state modeling, and signal processing for the RetroChallenge project.
| | craigjb.com
FPGA Game Boy Part 4: Loading immediate values and halting the CPU · Craig J. Bishop
3.8 parsecs away

Travel
| | [AI summary] This post discusses the implementation of load-immediate instructions and the halt instruction in the Game Boy CPU using SpinalHDL for FPGA simulation.
| | blog.dave.tf
Getting started with FPGA hacking · blog.dave.tf
2.2 parsecs away

Travel
| |
| | www.skrasser.com
Arduino Raster Bars-Sven Krasser's Blog
31.7 parsecs away

Travel
| Since I've always liked to understand technology from first principle,I've embarked on a small project to generate a VGA signal from scratchon an Arduino Uno...