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 craigjb.com
FPGA Game Boy Part 4: Loading immediate values and halting the CPU ยท Craig J. Bishop
| | www.righto.com
How the 8086 processor determines the length of an instruction
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| | The Intel 8086 processor (1978) has a complicated instruction set with instructions ranging from one to six bytes long. This raises the q...
| | austinmorlan.com
Building an FPGA Computer: SAP-1 - Austin Morlan
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| | Ive been getting into FPGAs lately. Last year I built an FPGA version of Ben Eaters breadboard computer, but Ive been wanting to do a more advanced project to help me gain experience with Verilog and FPGAs in general. For his breadboard computer, Ben Eater followed the design laid out in a book called Digital Computer Electronics by Malvino and Brown. The book builds what it calls the Simple-as-Possible (SAP) Computer.
| | unsafeperform.io
A Brainfuck CPU in FPGA (19 January 2013)
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| | [AI summary] The author details the design and simulation of a Brainfuck-based CPU implemented on an FPGA using the Lava Haskell DSL to overcome the limitations of VHDL for software developers.
| | jborza.com
CHIP-8 emulator in C | Juraj's Blog
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| CHIP-8 is one of the most popular target architectures for aspiring emulator writers. I'm planning to implement it in hardware, so I thought that writing a software emulator/interpreter would be enlightening. I was also looking for some practice before implementing CHIP-8 in hardware in Verilog :) CHIP-8 Virtual machine description: 64x32 pixel monochrome display 4K of 8-bit RAM 16 8-bit "variable" registers V0-VF I 16-bit address register Stack of 16-bit addresses for call/return 16-bit PC - program counter 8-bit delay timer (decremented at 60 Hz) until it reaches 0 8-bit sound timer (decremented at 60 Hz), beeps when it reaches 0 16- key keypad that sends scan codes 0x1-0xF Instruction set See https://en.