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perkin.org.uk
| | gergo.erdi.hu
2.4 parsecs away

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| | [AI summary] The author describes implementing a CHIP-8 CPU interpreter in Haskell, detailing the instruction set, state modeling, and signal processing for the RetroChallenge project.
| | leventkaya.com
4.8 parsecs away

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| | Technical and Personal Blog
| | unsafeperform.io
4.5 parsecs away

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| | [AI summary] The author describes running their CHIP-8 CPU implementation in software by using functional state machines alongside SDL for interactive debugging without HDL simulation.
| | davquar.it
28.6 parsecs away

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| The MIPS architecture is of type RISC and originated in 1981 from a research project by Prof. Hennessy at Stanford. This architecture is characterized by instructions of the same length, and is geared toward simplifying pipeline implementation.