You are here |
incoherency.co.uk | ||
| | | |
jborza.com
|
|
| | | | In the last part I ended up with a partially working CPU with most of the single-clock instructions implemented. So far, all of the testing was done in simulator only, and it's about time to to get a visual output, so I implemented the display sprite operation next. Other articles in the series: CHIP-8 in FPGA #1 (ALU) CHIP-8 in FPGA #2 (CPU) Display instruction: DXYN The DXYN opcode is described in the original manual as: | |
| | | |
www.humprog.org
|
|
| | | | ||
| | | |
theshamblog.com
|
|
| | | | I built a computer! A very primitive one, made out of breadboards, bare wire, and logic gates. But it's fully functioning, it looks awesome, and unlike the staggering complexity of modern processor... | |
| | | |
mrcat.au
|
|
| | I've started learning Zig, a new programming language in the same problem space as C, and it has some features I really like. While it's not memory-safe in the Rust way, it has a lot of compile time and runtime checks to prevent common footguns. It has packed structs and variable-width integers to allow for easy parsing of bitpacked binary formats. Its comptime metaprogramming capabilities are spectacular. And it even interoperates seamlessly with C! |