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 domipheus.com
Designing a CPU in VHDL, Part 7: Memory Operations, Running on FPGA - Domipheus Labs
| | jborza.com
Adventures in hardware, part 2 - even lower level | Juraj's Blog
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| | Ive went through the first part of From Nand to Tetris course where I learnt to build a simple 16-bit computer called Hack from the digital building blocks (NAND gates). The course used its specific HDL (hardware definition language), which is a gentle way to shield a beginner from the ugliness of a real language, but to implement anything on a real FPGA board one needs to use VHDL or Verilog.
| | www.righto.com
More ARM1 processor reverse engineering: the priority encoder
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| | In this article, I reverse-engineer the priority encoder in the ARM1 processor. By examining the chip layout provided by the Visual ARM1 p...
| | blog.eowyn.net
EccCPU - Error Correcting Code Central Processing Unit
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| | Proof-of-concept CPU where the instructions are hamming codes
| | faizilham.github.io
Revisiting Chip-8 | faiz.memdump()
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| It's been a while since I write emulator projects. While I do want to make more "serious" emulator like NES or GameBoy, I decided to do a warm up project by writing a Chip-8 emulator once more. Here are some interesting things I found and implemented during the development.