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www.pagetable.com
| | tobylobster.github.io
3.9 parsecs away

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| | embecosm.com
5.0 parsecs away

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| | [AI summary] This article dives into the internals of the RI5CY core, a 4-stage in-order pipelined RISC-V core. It discusses the decoder and register file, essential for customizing the core, particularly for adding new instructions and integrating cryptographic extensions like XCrypto. The article also compares RISC-V's compressed instructions with ARM's Thumb mode, highlighting differences in code density and implementation.
| | incoherency.co.uk
5.4 parsecs away

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| | [AI summary] The author details their journey learning CPU design through FPGAs, discrete logic chips, and the Nand2Tetris course, while exploring various DIY computer architectures and planning their next project.
| | kaworu.ch
31.8 parsecs away

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