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gergo.erdi.hu | ||
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blog.eowyn.net
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| | | | | The goal for this project was to develop a GPU-like core in VHDL for the Upduino v2 and v3. This would include a 60Hz 320x200 or 640x480 resolution output with read/write frame and color buffers, using PWM to increase the color depth. The color buffer would use color cells similar to those of the Commodore 64. However, due to limitations inherent in the Upduino, the full design was not realized. A simpler design with a text buffer was built instead. | |
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www.pjrc.com
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chipnetics.com
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| | | | | This is a concept design for a VGA line doubler that I've wanted to build for a while now. I'm putting my notebook rumblings on here for future reference, or if anyone wants to extend upon these ideas. | |
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crescentro.se
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| | | How difficult could it really be? | ||
