Outer Web | Explore

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You are here		unsafeperform.io CPU modeling in C?aSH (23 September 2018)
\|	\|	gergo.erdi.hu CPU modeling in C?aSH (23 September 2018) [AI summary] The author describes implementing a CHIP-8 CPU interpreter in Haskell, detailing the instruction set, state modeling, and signal processing for the RetroChallenge project.	0.0 parsecs Travel
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\|	\|	bryananthonio.com What I Learned About Computers in Nand2Tetris Part 1 Sharing key insights on how computers work, from logic gates and binary arithmetic to assembly languages.	10.1 parsecs Travel
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\|	\|	jborza.com CHIP-8 in hardware - part 1 (ALU) \| Juraj's Blog I got into FPGAs with the intent of building a retro-computer. A couple of popular hardware implementation targets are Gameboy, NES, RISC-V and CHIP-8. Last year Ive done my practice round with 6502 and RISC-V emulators, both in C. CHIP-8 is a really nice virtual machine implemented on a number of computers since the 1970s, initially designed to make game development easier. After building a CHIP-8 emulator a couple of days ago I thought I know a lot about the simple platform to actualy start implementin...	6.6 parsecs Travel
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\|	\|	unsafeperform.io A Brainfuck CPU in FPGA (19 January 2013) [AI summary] The author details the design and simulation of a Brainfuck-based CPU implemented on an FPGA using the Lava Haskell DSL to overcome the limitations of VHDL for software developers.	27.6 parsecs Travel
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