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tomverbeure.github.io | ||
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embecosm.com
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| | | | | [AI summary] This article dives into the internals of the RI5CY core, a 4-stage in-order pipelined RISC-V core. It discusses the decoder and register file, essential for customizing the core, particularly for adding new instructions and integrating cryptographic extensions like XCrypto. The article also compares RISC-V's compressed instructions with ARM's Thumb mode, highlighting differences in code density and implementation. | |
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www.bitsnbites.eu
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www.snell-pym.org.uk
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| | | | | [AI summary] The article discusses various exotic processor architectures, focusing on zero-operand stack machines, multiple stacks, result registers, virtual stacks, and transport-triggered architectures, highlighting their potential to simplify control logic and improve performance. | |
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filipnikolovski.com
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| | | A blog about programming, technology and open-source stuff. | ||
