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 gergo.erdi.hu
Cheap and cheerful microcode compression (2 May 2022)
| | www.snell-pym.org.uk
Snell-Pym » Processor architecture
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| | [AI summary] The article discusses various exotic processor architectures, focusing on zero-operand stack machines, multiple stacks, result registers, virtual stacks, and transport-triggered architectures, highlighting their potential to simplify control logic and improve performance.
| | unsafeperform.io
Cheap and cheerful microcode compression (2 May 2022)
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| | www.reenigne.org
8086 microcode disassembled « Reenigne blog
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| | [AI summary] The provided text is a detailed discussion of the 8086/8088 microcode, including various user interactions and technical insights. It covers topics such as microcode disassembly, interrupt handling, register operations, and the structure of the microcode ROM. Key points include the role of the group decoder, the handling of prefixes like REP, and the logic for determining microcode jumps. The text also references Andrew Jenner's disassembly of the microcode and mentions ongoing emulator development efforts.
| | jborza.com
CHIP-8 in hardware - part 1 (ALU) | Juraj's Blog
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| I got into FPGAs with the intent of building a retro-computer. A couple of popular hardware implementation targets are Gameboy, NES, RISC-V and CHIP-8. Last year Ive done my practice round with 6502 and RISC-V emulators, both in C. CHIP-8 is a really nice virtual machine implemented on a number of computers since the 1970s, initially designed to make game development easier. After building a CHIP-8 emulator a couple of days ago I thought I know a lot about the simple platform to actualy start implementin...