Explore >> Select a destination


You are here

projectf.io
| | kqueue.org
1.9 parsecs away

Travel
| | There are several commonly used RISC-V instruction pairs with 32-bit immediates. Below is an example of loading a 32-bit immediate into a register using lui/addi: lui rd,imm[31:12] addi rd,rd,imm[11:0] Here lui places a (sign-extended) 20-bit immediate into register rd and fills the lowest 12 bits with zeros, and addi adds a sign-extended 12-bit immediate to register rd.
| | blog.eowyn.net
3.1 parsecs away

Travel
| | Proof-of-concept CPU where the instructions are hamming codes
| | bryananthonio.com
4.1 parsecs away

Travel
| | Sharing key insights on how computers work, from logic gates and binary arithmetic to assembly languages.
| | nfraprado.net
122.9 parsecs away

Travel
|