Explore >> Select a destination


You are here

andybrown.me.uk
| | tomscii.sig7.se
13.2 parsecs away

Travel
| |
| | helentronica.com
15.2 parsecs away

Travel
| | IntroductionPart One - the transmitterTransmitter Circuit DesignLogic family choicePRBS architectureClock source and bufferDecoupling capacitorsManchester encoding Pre-emphasisLine driverLayout Introduction I am about to build a full PHY (physical, duh) layer for data transmission that simulates the multi-Gbps transceiver circuits usually seen in high-end FPGAs and ASICs. The reason I'm doing that is to get a closer...
| | tomscii.sig7.se
12.8 parsecs away

Travel
| |
| | andybrown.me.uk
96.8 parsecs away

Travel
| The story so far Welcome to the never ending saga of Andy and his reflow controllers. About a year ago I published a project writeup showing how I built a PID-based reflow controller. It featured a...