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gergo.erdi.hu
| | unsafeperform.io
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| | [AI summary] The author describes running their CHIP-8 CPU implementation in software by using functional state machines alongside SDL for interactive debugging without HDL simulation.
| | perkin.org.uk
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| | [AI summary] This post details the completion of a node.js-powered 8-bit CPU project by integrating shift registers and logic chips to write and read data on a 6809 processor connected to a Raspberry Pi.
| | jborza.com
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| | I got into FPGAs with the intent of building a retro-computer. A couple of popular hardware implementation targets are Gameboy, NES, RISC-V and CHIP-8. Last year Ive done my practice round with 6502 and RISC-V emulators, both in C. CHIP-8 is a really nice virtual machine implemented on a number of computers since the 1970s, initially designed to make game development easier. After building a CHIP-8 emulator a couple of days ago I thought I know a lot about the simple platform to actualy start implementin...
| | gpfault.net
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| [AI summary] The text provides an in-depth exploration of various x86-64 instruction set architectures, focusing on arithmetic operations (ADD, SUB, MUL, SMUL, DIV, SDIV), logical operations (AND, OR, XOR, NOT), and control flow instructions. It details the implementation of these instructions in the QBX virtual machine, emphasizing how they emulate real x86-64 instructions while managing the flags register and handling different operand sizes (8-bit and 16-bit). The text also discusses the nuances of flag handling, register operations, and macro-based code generation to streamline instruction implementation.