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www.thanassis.space | ||
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domipheus.com
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| | | | | This is part of a series of posts detailing the steps and learning undertaken to design and implement a CPU in VHDL. Previous parts are available here, and I'd recommend they are read before continuing. It's finally time - the big deploy onto Digilent's Arty S7 board. In my previous part, I went over at a high level the changes made to my TPU cpu core in order to make it consume RISC-V. The CPU itself is still very simple, and I removed some of the more interesting features from TPU such as interrupts. I... | |
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kuruczgy.com
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| | | | | [AI summary] The article discusses the author's experience of running Lean, a pure functional programming language, on an ESP32 microcontroller for a project involving LED control. Despite Lean's purity, the author utilized its monadic features to handle impure operations like GPIO manipulation and delays. The project involved significant optimizations, including custom bit-banging for the WS2812 LED protocol and reducing code size through various techniques. The author also outlines future directions for the project, including potential improvements in compilation, hardware support, and further optimizations. | |
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www.righto.com
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| | | | | A Field-Programmable Gate Array (FPGA) can implement arbitrary digital logic, anything from a microprocessor to a video generator or crypt... | |
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g-w1.github.io
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| | | See part 2 for this post here | ||
