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paul.bone.id.au | ||
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www.timdbg.com
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| | | | | [AI summary] This article provides an introduction to reading x86 assembly language, emphasizing its importance for understanding how programs operate at a fundamental level. It covers the basics of assembly syntax, common instructions, and practical tools for reading and analyzing assembly code. The author explains that while assembly is often viewed as complex, it's actually more approachable than many believe, especially for debugging and reverse engineering tasks. The article also highlights the differences between Intel and AT&T syntax, the structure of assembly instructions, and the role of registers and memory addressing in x86 architecture. | |
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shellsharks.com
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| | | | | An introduction to x86 Intel assembly. | |
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kellanclark.github.io
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| | | | | A mod (jokingly) told me I had to make a Neo Geo Pocket emulator, so I intend to showcase the pain that has caused me. This was going to be a list of rants, but most of them were way too short, so enjoy this diary of things that made me go WTF instead. 10/18/2023 - Register Encoding I started work on this emulator recently. The TLCS-900/H is a really cool processor, but I want to personally murder whoever made the register encoding. My first encounter with it was this: Seems OK enough. 8 32-bit registers, 8 16-bit registers, and 8 8-bit registers structured in a way reminiscent of SM83, 8080, Z80, etc. It's familiar to me and shouldn't be a problem. The main 4 are banked (controlled by some bits in SR) and the other 4 are always the same, but that's fine. I'... | |
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embecosm.com
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| | | [AI summary] This article dives into the internals of the RI5CY core, a 4-stage in-order pipelined RISC-V core. It discusses the decoder and register file, essential for customizing the core, particularly for adding new instructions and integrating cryptographic extensions like XCrypto. The article also compares RISC-V's compressed instructions with ARM's Thumb mode, highlighting differences in code density and implementation. | ||
